#pragma once
enum VIEU_OP{
    VADD_src1_vr, //op = 111_0000_100, execution cycle = 1
    VADD_src1_imm, //op = 111_1000_100, execution cycle = 1
    VADDU_src1_vr, //op = 110_0000_100, execution cycle = 1
    VADDU_src1_imm, //op = 110_1000_100, execution cycle = 1
    VADD32_src1_vr, //op = 101_0000_100, execution cycle = 1
    VADD32_src1_imm, //op = 101_1000_100, execution cycle = 1
    VADDU32_src1_vr, //op = 100_0000_100, execution cycle = 1
    VADDU32_src1_imm, //op = 100_1000_100, execution cycle = 1
    VSUB_src1_vr, //op = 111_0000_000, execution cycle = 1
    VSUB_src1_imm, //op = 111_1000_000, execution cycle = 1
    VSUBU_src1_vr, //op = 110_0000_000, execution cycle = 1
    VSUBU_src1_imm, //op = 110_1000_000, execution cycle = 1
    VSUBC, //op = 110_0000_010, execution cycle = 1
    VSUB32_src1_vr, //op = 101_0000_000, execution cycle = 1
    VSUB32_src1_imm, //op = 101_1000_000, execution cycle = 1
    VSUBU32_src1_vr, //op = 100_0000_000, execution cycle = 1
    VSUBU32_src1_imm, //op = 100_1000_000, execution cycle = 1
    VSUBC32, //op = 100_0000_010, execution cycle = 1
    VSAT, //op = 111_0101_000, execution cycle = 1
    VSAT32, //op = 101_0101_000, execution cycle = 1
    VNEG, //op = 111_0100_100, execution cycle = 1
    VNEG32, //op = 101_0100_100, execution cycle = 1
    VABS, //op = 111_0100_000, execution cycle = 1
    VABS32, //op = 101_0100_000, execution cycle = 1
    VMAX, //op = 111_0001_100, execution cycle = 1
    VMAXU, //op = 110_0001_100, execution cycle = 1
    VMAX32, //op = 101_0001_100, execution cycle = 1
    VMAXU32, //op = 100_0001_100, execution cycle = 1
    VMIN, //op = 111_0001_000, execution cycle = 1
    VMINU, //op = 110_0001_000, execution cycle = 1
    VMIN32, //op = 101_0001_000, execution cycle = 1
    VMINU32, //op = 100_0001_000, execution cycle = 1
    VEQ_src1_vr, //op = 111_0010_000, execution cycle = 1
    VEQ_src1_imm, //op = 111_1010_000, execution cycle = 1
    VLT_src1_vr, //op = 111_0010_010, execution cycle = 1
    VLT_src1_imm, //op = 111_1010_010, execution cycle = 1
    VLTU_src1_vr, //op = 110_0010_010, execution cycle = 1
    VLTU_src1_imm, //op = 110_1010_010, execution cycle = 1
    VEQ32_src1_vr, //op = 101_0010_000, execution cycle = 1
    VEQ32_src1_imm, //op = 101_1010_000, execution cycle = 1
    VLT32_src1_vr, //op = 101_0010_010, execution cycle = 1
    VLT32_src1_imm, //op = 101_1010_010, execution cycle = 1
    VLTU32_src1_vr,//op = 100_0010_010,execution cycle = 1
    VLTU32_src1_imm, //op = 100_1010_010, execution cycle = 1
    VMOV_VIEU, //op = 111_1110_001, execution cycle = 1
    VMVCGC, //op = 111_1110_010, execution cycle = 1/2
    VMVCCG, //op = 111_1110_011, execution cycle = 1/2
    VMOVI_VIEU, //op 80位指令, execution cycle = 1
    VMOVI24_VIEU, //op 40位指令, execution cycle = 1
    VAND_src1_vr, //op = 111_0011_000, execution cycle = 1
    VAND_src1_imm, //op = 111_1011_000, execution cycle = 1
    VOR_src1_vr, //op = 111_0011_010, execution cycle = 1
    VOR_src1_imm, //op = 111_1011_010, execution cycle = 1
    VXOR_src1_vr, //op = 111_0011_100, execution cycle = 1
    VXOR_src1_imm, //op = 111_1011_100, execution cycle = 1
    VNOT_src1_vr, //op = 111_0011_110, execution cycle = 1
    VNOT_src1_imm, //op = 111_1011_110, execution cycle = 1
    VLZD, //op = 111_0101_100, execution cycle = 1
    VLZD32, //op = 101_0101_100, execution cycle = 1
    VSHFLL32_src1_vr, //op = 0000_0000_00, execution cycle = 1
    VSHFLL32_src1_imm, //op = 0010_0000_00, execution cycle = 1
    VSHFLL_src1_vr, //op = 0100_0000_00, execution cycle = 1
    VSHFLL_src1_imm, //op = 0110_0000_00, execution cycle = 1
    VSHFLR32_src1_vr, //op = 0000_1000_00, execution cycle = 1
    VSHFLR32_src1_imm, //op = 0010_1000_00, execution cycle = 1
    VSHFLR_src1_vr, //op = 0100_1000_00, execution cycle = 1
    VSHFLR_src1_imm, //op = 0110_1000_00, execution cycle = 1
    VSHFAR32_src1_vr, //op = 0001_0000_00, execution cycle = 1
    VSHFAR32_src1_imm, //op = 0011_0000_00, execution cycle = 1
    VSHFAR_src1_vr, //op = 0101_0000_00, execution cycle = 1
    VSHFAR_src1_imm, //op = 0111_0000_00, execution cycle = 1
    VBCLR32, //op = 0000_0010_00, execution cycle = 1
    VBCLR, //op = 0100_0010_00, execution cycle = 1
    VBSET32, //op = 0000_1010_00, execution cycle = 1
    VBSET, //op = 0100_1010_00, execution cycle = 1
    VBEX32, //op = 0001_0010_00, execution cycle = 1
    VBEX, //op = 0101_0010_00, execution cycle = 1
    VBTST32, //op = 0001_1010_00, execution cycle = 1
    VBTST, //op = 0101_1010_00, execution cycle = 1
    VBEXT32, //op = 0010_0010_00, execution cycle = 1
    VBEXT, //op = 0110_0010_00, execution cycle = 1
    VBEXT32U, //op = 0010_1010_00, execution cycle = 1
    VBEXTU, //op = 0110_1010_00, execution cycle = 1
    VBALE2, //op = 0000_0100_00, execution cycle = 1
    VBALE2H, //op = 0000_1100_00, execution cycle = 1
    VBALE2LH, //op = 0001_0100_00, execution cycle = 1
    VBALE2HL, //op = 0001_1100_00, execution cycle = 1
    VBALE4H, //op = 0010_0100_00, execution cycle = 1
    VBALE4L, //op = 0010_1100_00, execution cycle = 1
    VSBALE2, //op = 0011_0100_00, execution cycle = 1
    VSBALE4, //op = 0011_1100_00, execution cycle = 1
    VUBALE4H, //op = 0100_0100_00, execution cycle = 1
    VUBALE4L, //op = 0100_1100_00, execution cycle = 1
    VITL2, //op = 0101_0100_00, execution cycle = 1
    VITL4, //op = 0101_1100_00, execution cycle = 1
    //TODOszy:补全VIEU的全部操作
};